Outside of teaching and planned consulting, one of the things I get to do at Vitech is answer the methodology questions that come in each day from our customers.
One of the more common questions we’ve been fielding lately is “How does interface development work in CORE 9?” CORE 9 is different than previous versions of the software, and it’s important to get a strong understanding to fully leverage the power of the changes.
First, before going any further with INTERFACE development in CORE, I recommend reviewing the following sections of the System Definition Guide (SDG):
Section 1.3 Define System Boundary
Section 1.13 Allocate Functions to Next Level of Components
Section 1.14 Refine External Interface Definition
Section 1.15 Derive or Refine Internal Interfaces [more]
Using the STRATA™ methodology in CORE, the systems engineer should be developing the system by doing the following steps in order:
(a.) Define integrated behavior (for the level under investigation / design)
(b.) Define a candidate physical architecture
(c.) Allocate the integrated behavior to the physical architecture
(d.) Define the Interfaces associated with the architecture
As discussed in Section 1.15 of the SDG, the terminus points for INTERFACE and LINKS must change as lower-level COMPONENTS are introduced. Since the INTERFACE and LINK classes are decomposable, one may use, as appropriate, a child INTERFACE or LINK to connect to the correct lower-level COMPONENTS. Using the decomposition of INTERFACE and LINK simplifies the maintenance of the connections as the INTERFACE design proceeds. One terminus of the INTERFACE changes to the lower level component as the system physical architecture development continues at lower levels.
The system engineer also needs to be aware of how the I/F Block and Physical Block diagrams are drawn. These diagrams are based on the component element selected (and therefore the level selected). The diagram shows all of the next lower level (daughter) components (related through the “built in” relation). INTERFACE(s) or LINKS(s) (depending on the diagram) associated with these COMPONENTS are shown on the diagram. COMPONENTS external to the (direct) level related through the “built in” relationship are considered “external components” (in other words- external to the level represented in the diagram).
In CORE 9, if the systems engineer does not want to display the “external components” on the I/F Block or Phys Block diagrams, the external components and interface or link can be hidden using the “Hide Selected Object” and then “Set Display Mode” to Hidden or Hidden (with Lable) with the buttons on the Diagram Toolbar.
As always, CORE users who are on our maintenance plan are encouraged to give us a call with any questions they have about using CORE. Just email support at firstname.lastname@example.org or call 540-951-3999.